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Renesas Unveils Industry's First 650V GaN in Dual-Side Cooled 8x8mm Package

Renesas TP65H020G4PLSGBD 650V GaN Dual-Side Cooled Device
Renesas TP65H020G4PLSGBD 650V GaN Dual-Side Cooled Device

Renesas Electronics Corporation, a leading supplier of advanced semiconductor solutions, has introduced the TP65H020G4PLSGBD, the industry's first 650V GaN device featuring dual-side cooling (DSC). This D-Mode device is engineered for high-density power conversion within 800V high-voltage DC (HVDC) AI data center architectures, delivering 20 milliohms (mΩ) on-resistance, one of the lowest in its class.

This new GaN device is purpose-built to address the critical challenges of space and heat in megawatt-scale AI data centers, where rack power is rapidly increasing. Unlike conventional top-side-cooled packages, its innovative dual-side cooling design dissipates heat from both the top and bottom surfaces, significantly improving thermal performance. The ultra-compact 8x8 mm PQFN package also offers a 57% smaller footprint compared to existing TOLT packages, enabling designers to pack more power into space-constrained racks without extensive board redesigns or additional cooling hardware.

Source Link: Press Release

Specifications

Product Type Voltage Rating On-Resistance Package Type Cooling Method Footprint Key Advantage
TP65H020G4PLSGBD D-Mode GaN device 650V 20 mΩ PQFN Dual-side cooling (DSC) 8x8 mm Industry's first 650V GaN with DSC; 57% smaller footprint than TOLT; 10% lower top-side thermal impedance; one of the lowest on-resistances in its class

Key Features

  • Industry's first 650V GaN device with dual-side cooling (DSC).
  • Features 20 mΩ on-resistance, among the lowest in the 650V class.
  • Housed in an ultra-compact 8x8 mm dual-side-cooled PQFN package.
  • Reduces package footprint by 57% compared to the existing 10x15mm TOLT package.
  • Dissipates heat from both top and bottom, decreasing top-side thermal impedance by 10%.
  • Built on Renesas' Gen IV Plus GaN architecture, supporting up to 700V operation.
  • Incorporates low gate charge, output capacitance, and a built-in freewheeling diode with minimal reverse recovery.
  • High threshold voltage allows operation without a negative gate bias.
  • Compatible with standard silicon gate drivers, eliminating the need for specialized E-mode drivers.
  • Enables switching into the MHz frequency range to minimize passive components and reduce overall BOM cost.
  • Achieves a power density of 2.6 kW/in³ in a 6kW, 800V-to-48V LLC DC transformer reference design.
  • Delivers 0.21% higher full-load efficiency compared to an equivalent TOLT-based board in testing.

Applications

  • High-density power conversion in 800V high-voltage DC (HVDC) AI data center architectures.
  • Megawatt-scale AI data centers requiring increased power density and thermal management.
  • 800V DC/DC intermediate bus converter (IBC) stages, stepping down to 48V, 12V, or 6V.
  • Battery backup (BBU) stages of sidecar power racks.
  • Capacitor bank (CBU) stages of sidecar power racks.
  • 6kW, 800V-to-48V LLC DC transformer (DCX) designs.
  • 800V-to-12V and 6V DC/DC IBC designs.

Avalibility

Renesas Electronics Corporation has commenced sampling of its new TP65H020G4PLSGBD 650V gallium nitride (GaN) FET to major AI data center original equipment manufacturers (OEMs) and original design manufacturers (ODMs). Announced on September 30, 2026, the device features a dual-side-cooled 8 × 8mm PQFN package and an on-resistance of 20 mΩ, designed to support high-density power conversion in next-generation 800V DC AI data center architectures. The compact package and improved thermal performance make it suitable for megawatt-scale AI infrastructure applications, including intermediate bus converters and battery and capacitor backup power systems. While sampling is currently underway for evaluation and design integration, mass production is planned for mid-2027.

Component Datasheet

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