1.6T Ethernet PHY with Up to 800 GbE Connectivity for Cloud Data Centers, 5G and AI

9 September 2021 - 0 Comments

Microchip has introduced a multi-purpose low-power PHY (physical layer) solution PM6200 META-DX2L that enables routers, switches, and line cards to double their bandwidth by transitioning to 112G PAM4 interface rates and offers the connectivity versatility to maximize design reuse across applications ranging from a retimer, gearbox or reverse gearbox to a hitless 2:1 multiplexor (mux). This compact device supports Ethernet, OTN, and fibre channel data rates and proprietary data rates for AI/ML applications. This solution suits a wide range of applications like fabric card and line card in a modular switch/router system, fixed form factor switch/router system, AI acceleration nodes, and compact optical transport platform.

PM6200 META-DX2L solution supports up to 1.6 Tbps capacity in retiming applications and reduces power per port by 35% as compared to its 56G PAM4 predecessor, META-DX1. The device features 32 SerDes, a hitless 2:1 mux, a flexible crosspoint, and support for additional protocols, such as Fibre Channel and OTN. The high availability architectures and the device latency enable Class C/D PTP at the system level. Moreover, its SerDes can support backplanes and passive Direct Attach (DAC) cables at up to 112 Gbps and can also be configured to reduce power for VSR applications.

Features

Up to 1.6 Tbps capacity throughput in a single device
Ethernet client support from 1 GbE to 800 GbE
32 LR capable 1G NRZ to 112G PAM4 SerDes
Ethernet, OTN, and Fibre Channel retiming
Supports proprietary data rates for AI/ML applications
800G forward and reverse gearbox modes
Hitless 2:1 mux mode for Working/Protect functionality
16 × 16 crosspoint functionality supports “any-to-any” SerDes connection on both line and host interfaces
PRBS generation, diagnostic loopbacks, and eye monitoring on all SerDes lanes
Industrial temperature range support