J111 N-Channel JFET Transistor Pinout, Marking Code, Equivalent & Datasheet

The J111 JFET is an N-channel junction FET built for low-level analog switching, sample-and-hold circuits and chopper-stabilised amplifiers. Below you will find the J111 pinout, J111 datasheet specifications, J111 equivalents, and a J111 circuit diagram for pop-free audio muting.

The standard J111 is housed in the standard TO-92 package. The terminal designations are summarised below:

*Note: Due to the symmetrical planar design of junction field-effect transistors, Pins 1 and 2 (Drain and Source) can be interchanged in analog switching and muting circuits without degrading performance.

J111 Package & SMD Marking Codes

The J111 is manufactured in both leaded through-hole and surface-mount packaging formats. For space-constrained SMT printed circuit boards, the device is marketed under the MMBFJ111 designation in the miniature SOT-23 package:

*Note: SOT-23 top markings may include date codes, manufacturer location identifiers, or orientation dots adjacent to the 6X primary alphanumeric code.

J111 Key Features & Specifications

• Transistor Polarity & Type: N-Channel Depletion-Mode Junction FET (JFET)
• Drain-Gate Voltage (VDG): 35V
• Gate-Source Voltage (VGS): -35V
• Gate-Source Breakdown Voltage (V(BR)GSS): 35V min (at IG = -1.0 µA)
• Zero-Gate-Voltage Drain Current (IDSS): 20 mA min (at VDS = 15V, VGS = 0V)
• Gate-Source Cutoff Voltage (VGS(off)): -3.0V to -10V (at VDS = 5.0V, ID = 1.0 µA)
• Static Drain-Source On-Resistance (rDS(on)): 30 Ω max (typ. 15 Ω - 20 Ω at VDS = 0.1V, VGS = 0V)
• Gate Reverse Current (IGSS): 1.0 nA max (at VGS = -15V, VDS = 0V)
• Drain-Cutoff Current (ID(off)): 1.0 nA max (at VDS = 5.0V, VGS = -10V)
• Input / Inter-Electrode Capacitance (Cdg(on) + Csg(on)): 28 pF max (at VDS = VGS = 0V, f = 1.0 MHz)
• Turn-On Delay / Rise Time (td(on) / tr): 4.0 ns typ / 6.0 ns typ (at ID = 20 mA)
• Turn-Off Delay / Fall Time (td(off) / tf): 6.0 ns typ / 25 ns typ (at ID = 20 mA)
• Maximum Power Dissipation (PD): 350 mW (TO-92 at TA = 25°C, derating 2.8 mW/°C)
• Operating Junction & Storage Temperature: -65°C to +150°C
• Lead Solder Temperature (TL): 300°C (maximum 10 seconds duration)

*Note: Complete Technical Details can be found in the J111 datasheet given at the end of this page.

J111 Equivalent & Alternative Components

The right J111 equivalent depends on what you need to keep: the package, the low on-resistance, or the gate-drive voltage. Check VGS(off) and rDS(on) first, because a substitute with a shallower cutoff or higher resistance changes muting depth and distortion.

Brief Description of J111

The J111 belongs to the renowned J111/J112/J113 family of silicon N-channel junction field-effect transistors specifically tailored for low-resistance switching. Unlike enhancement-mode MOSFETs that require a positive gate-to-source bias to induce an inversion layer, the J111 features a naturally doped N-type conduction channel spanning from drain to source. In the absence of an applied gate bias (VGS = 0V), majority carrier electrons flow unobstructed between drain and source, presenting an exceptionally low channel resistance of rDS(on) ≤ 30 Ω.
A key operational advantage of JFETs over bipolar junction transistors (BJTs) in analog switching is the complete absence of a collector-emitter saturation voltage offset (VCE(sat) = 0V). This enables true bilateral, microvolt-level signal transmission with near-zero harmonic distortion. Furthermore, unlike MOSFETs that incorporate an intrinsic body-drain PN junction diode, the JFET has no parasitic substrate diode shunting the channel. This prevents unintended signal clipping or reverse conduction when handling bipolar AC signals, provided the gate junction remains reverse-biased relative to both source and drain.
To switch the J111 OFF, the gate terminal must be driven significantly negative with respect to the source and drain terminals. When VGS reaches the cutoff voltage VGS(off) (specified between -3.0 V and -10V for the J111), the reverse-biased PN junction depletion regions expand and merge across the entire channel cross-section, terminating carrier flow. Because the J111 requires up to -10V for full cutoff, circuit designs operating on bipolar supplies (such as ±12V or ±15V) provide the ideal control voltage headroom.

J111 Datasheet

Download the official manufacturer J111 datasheet for the J111 N-Channel JFET Chopper Transistor. The same document covers the J111, J112, J113 and the SOT-23 MMBFJ111, MMBFJ112 and MMBFJ113, including ratings, electrical characteristics, thermal data, package drawings and marking diagrams.

J111 Circuit Diagram: Pop-Free Audio Muting

The J111 is frequently deployed as a shunt analog switch or pop-free audio muting circuit in audio DACs, preamplifiers, and mixing consoles. In the J111 circuit diagram below configuration, the J111 shunts unwanted transient clicks, power-down pops, or muted signals directly to analog ground.

How to Use the J111 in a Circuit Operation & Component Selection

The J111 JFET provides audio muting through shunt switching. The input audio signal passes through a 10 µF coupling capacitor and a 10 kΩ series resistor, while the J111 connects the signal path to analog ground. When the MUTE control is at -12V, the JFET turns OFF, allowing the audio signal to pass with minimal attenuation. When the control is at 0V, the JFET turns ON, shunting the signal to ground and providing approximately 50 dB of attenuation. A 2N3904 or BC547 NPN transistor can interface the circuit with 3.3V or 5V microcontroller GPIOs, enabling software-controlled muting during power transitions or track changes without mechanical relay noise.

Applications

• Pop-Free Audio Muting: Suppressing power-up thumps and switching pops in DAC outputs, home theatre amplifiers, and studio mixing consoles.
• Precision Analog Commutators: High-speed bilateral signal multiplexing and signal routing in data acquisition systems.
• Sample-and-Hold Circuits: Low-leakage sampling switches in analog-to-digital converters and precision measurement instrumentation.
• Voltage-Controlled Attenuators (VCR): Operating in the ohmic/triode region as an electrically tunable analog resistor for automatic gain control (AGC).
• Chopper-Stabilized Amplifiers: Low-frequency AC modulation of microvolt DC instrumentation signals to eliminate op-amp 1/f flicker noise and DC drift.
• RF & Video Signal Gating: Fast RF signal gating and baseband switching with minimal inter-terminal parasitic capacitance.
• Solid-State Relays: Fast, bounce-free replacement for mechanical reed relays in low-level signal testing equipment.

2D Model and Component Dimensions

For PCB layout engineers and CAD designers creating footprints in KiCad, Altium Designer, Eagle, or EasyEDA, the mechanical dimensions for the standard through-hole TO-92 (Case 29-11, Style 5) package are listed below: